RISC-V’s Ascent Could Reshape The Global Compute Landscape

For decades, chip architectures have been dominated by a pair of towering incumbents—x86 and Arm—defining and powering everything from laptops to hyperscale data centers. But in recent years, the open-standard RISC-V instruction set architecture has evolved from an academic project into a legitimate disruptor, increasingly embedded across a diverse range of compute platforms.

Today, amid a wave of industry consolidation, geopolitical shifts, and an AI-driven workload explosion, RISC-V is accelerating toward mainstream relevance with some of the largest chip players backing it.

RISC-V: From Academic Roots To A Billion Cores Milestone

RISC-V was born in 2010 at UC Berkeley, designed as a clean-slate, royalty-free ISA optimized for modern workloads and extensibility. Its founding team—still active in steering the standard through RISC-V International (RVI)—envisioned an open hardware ecosystem that encouraged innovation across both academia and industry.

That vision has been bearing fruit in recent years and in fact, in 2024, Nvidia shipp

ed over one billion RISC-V cores onboard its GPUs. These cores serve as microcontrollers and security processors, managing tasks like power, telemetry, and safety-critical logic, where lightweight, highly customizable architectures excel. However, this was just one of many proof points in validation of the technology.

And just a few days ago, Nvidia announced CUDA support on RISC-V host system processors was coming, which would enable developers to write GPU-accelerated applications for RISC-V CPUs. This is very big news, as it now also positions RISC-V as a viable general purpose compute platform, capable of driving heterogeneous AI workloads, particularly in embedded, edge, and autonomous systems where Arm once reigned supreme.

For a company as dominant in accelerated computing as Nvidia to validate RISC-V as a CUDA host is a sea change, and a green light to broader ecosystem adoption. Obviously, Nvidia sees that the future of RISC-V processor hosts in clients and the data center is already taking shape.

SiFive Evolves From Founders To Flagship RISC-V IP

Few companies have done more to commercialize RISC-V solutions than SiFive. Founded by three of the ISA’s creators, SiFive has emerged as a flagship IP vendor in the space, delivering RISC-V processor cores from ultra-efficient MCUs to high-performance vector and application-class CPUs.

Its IP is already found in products from major cloud and AI companies, and SiFive continues to expand its footprint. A recent partnership with Synopsys helps streamline system-on-chip designs using familiar EDA tools, while support from Red Hat and Canonical ensures full Linux compatibility out of the box. With respect to other large players, Google is also reportedly using SiFive cores in upcoming TPU designs, further cementing its status as a go-to RISC-V partner.

Internally, SiFive has expanded its focus to defense and aerospace, while also targeting automotive and edge AI, segments where vector performance for heavy compute and image processing, deterministic execution, and ISA flexibility are mission critical.

RISC-V Ecosystem Ignition

A strong ISA needs a strong ecosystem, and RISC-V is seeing meaningful support across all levels of the stack. Android is being ported to RISC-V, with full RVA23 compliance under development. Ubuntu and Red Hat Enterprise Linux are already available on SiFive hardware, giving software developers familiar toolchains. Tenstorrent, a new AI chip start-up co-founded by legendary chip architect Jim Keller, and also a SiFive customer, is designing RISC-V-based CPUs targeting AI and high-performance edge workloads. Meanwhile, Ahead Computing, another RISC-V start-up with ties to Intel talent, is quietly making strides in server-class designs.

Finally, all of the “Magnificent Seven” tech giants reportedly use RISC-V in some capacity, with five of them working directly with SiFive (and likely others). These include datacenter service processors, AI accelerators, and custom embedded cores—proof that RISC-V’s flexibility fits many application use cases.

Customization And Chip Sovereignty

What makes RISC-V different isn’t just the open license, it’s the ability to tailor the architecture to the application. Unlike x86 or Arm, which impose fixed instruction sets and licensing constraints, RISC-V lets chipmakers design exactly what they need, nothing more, nothing less.

That’s a major win in the AI era, where model diversity and workload complexity demand hardware tuned for domain specific workloads and energy efficiency.

That said, it’s also critical geopolitically. With nations racing to secure their own chip supply chains, RISC-V has become a strategic enabler of semiconductor sovereignty. In the US, DoD-aligned programs are increasingly turning to open ISAs to avoid reliance on foreign-controlled IP. Even GlobalFoundries’ acquisition of MIPS plays into the RISC-V narrative, expanding IP offerings while avoiding competitive overlap.

Final Thoughts On RISC-V’s Future, Challenges And The Road Ahead

Of course, despite its momentum, RISC-V still faces headwinds. The software stack, though rapidly improving, lacks the decades of legacy optimization behind x86 or Arm architectures. Toolchain fragmentation, limited driver support, and early-stage debugging tools still pose barriers, particularly in high-performance compute. Governance is another concern. While RISC-V International continues to standardize extensions and promote compatibility, the risk of fragmentation remains if vendors diverge too far from the core spec.

Yet even with those challenges, the architectural advantages are strong. In a market shifting toward domain-specific compute, chiplet-based design, and heterogeneous acceleration, RISC-V offers a level of flexibility, openness, and modularity that few others can match.

Obviously, RISC-V won’t topple Arm or x86 overnight, but that’s not the point. Instead, it’s now beginning to establish beachheads in markets where customization, efficiency, and freedom from licensing constraints are competitive advantages.

As Nvidia, Google, Red Hat, and others embrace RISC-V not just for microcontrollers but for host processors, AI pipelines, and full-stack development, the architecture is maturing from just an alternative to a strategic asset.

In today’s silicon landscape that’s so often dominated by constrained IP entanglements, RISC-V is offering a different path—one that’s open, adaptable, and increasingly hard to ignore.

Dave co-founded and is principal analyst at HotTech Vision And Analysis, a tech industry analyst firm specializing in consulting, test validation and go-to-market strategies for major chip and system OEMs. Like all analyst firms, HTVA provides paid services, research and consulting to many chip manufacturers and system OEMs, including companies mentioned in this article. However, this does not influence his unbiased, objective coverage.

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